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ESP32 chip has multiple memory types and flexible memory mapping features. This section describes how ESP-IDF uses these features by default. ESP-IDF distinguishes between instruction memory bus (IRAM, IROM, RTC FAST memory) and data memory bus (DRAM, DROM). Instruction memory is executable, and can only be read or written via 4-byte aligned words. Data memory is not executable and can be accessed via individual byte operations. For more information about the different memory buses consult the ESP32 Technical Reference Manual > System and Memory [PDF]. DRAM (Data RAM)Non-constant static data (.data) and zero-initialized data (.bss) is placed by the linker into Internal SRAM as data memory. The remaining space in this region is used for the runtime heap. By applying the The
available size of the internal DRAM region is reduced by 64 KB (by shifting start address to Constant data may also be placed into DRAM, for example if it is used in an non-flash-safe ISR (see explanation under How to place code in IRAM). “noinit” DRAMThe macro By applying the Example: __NOINIT_ATTR uint32_t noinit_data; IRAM (Instruction RAM)ESP-IDF allocates part of the Internal SRAM0 region for instruction RAM. The region is
defined in ESP32 Technical Reference Manual > System and Memory > Embedded Memory [PDF]. Except for the first 64 KB block which is used for PRO and APP MMU caches, the rest of this memory range (i.e. from When to place code in IRAMCases when parts of the application should be placed into IRAM:
How to place code in IRAMSome code is automatically placed into the IRAM region using the linker script. If some specific application code needs to be placed into
IRAM, it can be done by using the Linker Script Generation feature and adding a linker script fragment file to your component that targets at the entire source files or functions with the Alternatively, it’s possible to specify IRAM placement in the source code using the #include "esp_attr.h" void IRAM_ATTR gpio_isr_handler(void* arg) { // ... } There are some possible issues with placement in IRAM, that may cause problems with IRAM-safe interrupt handlers:
Note that knowing which data should be marked with
Jump table optimizations can be re-enabled for individual source files that don’t need to be placed in IRAM. For instructions on how to add the IROM (code executed from flash)If a function is not explicitly placed into IRAM (Instruction RAM) or RTC memory, it is placed into flash. As IRAM is limited, most of an application’s binary code must be placed into IROM instead. The mechanism by which Flash MMU is used to allow code execution from flash is described in ESP32 Technical Reference Manual > Memory Management and Protection Units (MMU, MPU) [PDF]. During Application Startup Flow, the bootloader (which runs from IRAM) configures the MMU flash cache to map the app’s instruction code region to the instruction space. Flash accessed via the MMU is cached using some internal SRAM and accessing cached flash data is as fast as accessing other types of internal memory. DROM (data stored in flash)By default, constant data is placed by the linker into a region mapped to the MMU flash cache. This is the same as the IROM (code executed from flash) section, but is for read-only data not executable code. The only constant data not placed into this memory type by default are literal constants which are embedded by the compiler into application code. These are placed as the surrounding function’s executable instructions. The RTC Slow memoryGlobal and static variables used by code which runs from RTC memory must be placed into RTC Slow memory. For example deep sleep variables can be placed here instead of RTC FAST memory, or code and variables accessed by the ULP Coprocessor programming. The attribute macro named Example: RTC_NOINIT_ATTR uint32_t rtc_noinit_data; RTC FAST memoryThe same region of RTC FAST memory can be accessed as both instruction and data memory. Code which has to run after wake-up from deep sleep mode has to be placed into RTC memory. Please check detailed description in deep sleep documentation. RTC FAST memory can only be accessed by the PRO CPU. In single core mode, remaining RTC FAST memory is added to the heap unless the option CONFIG_ESP_SYSTEM_ALLOW_RTC_FAST_MEM_AS_HEAP is disabled. This memory can be used interchangeably with DRAM (Data RAM), but is slightly slower to access and not DMA capable. DMA Capable RequirementMost peripheral DMA controllers (e.g. SPI, sdmmc, etc.) have requirements that sending/receiving buffers should be placed in DRAM and word-aligned. We suggest to place DMA buffers in static variables rather than in the stack. Use macro DMA_ATTR uint8_t buffer[]="I want to send something"; void app_main() { // initialization code... spi_transaction_t temp = { .tx_buffer = buffer, .length = 8 * sizeof(buffer), }; spi_device_transmit(spi, &temp); // other stuff } Or: void app_main() { DMA_ATTR static uint8_t buffer[] = "I want to send something"; // initialization code... spi_transaction_t temp = { .tx_buffer = buffer, .length = 8 * sizeof(buffer), }; spi_device_transmit(spi, &temp); // other stuff } It is also possible to allocate DMA-capable memory buffers dynamically by using the MALLOC_CAP_DMA capabilities flag. DMA Buffer in the stackPlacing DMA buffers in the stack is possible but discouraged. If doing so, pay attention to the following:
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